Engineering Positions:
ASIC Design Engineer
As an ASIC Design Engineer you will
be responsible for designing and verifying parts within our
video coding ASICs. Design work includes: design of new
blocs, incorporation and modification of existing Xeole IPs,
and incorporation of various third party IP.
Applicants
should have a minimum of 4-5 years ASIC design/verification
experience. VHDL or Verilog coding and synthesis experience
are a must.
Date: Jan 2006
Software Engineer
As a Software Engineer, you will
design and implement video encoder and decoder software that
will run on our ASIC SoC's. You will will work closely with
the architect team to develop functional software IPs
initially in a PC environment and then later running in the
ASIC.
Applicants should have a minimum of 3-5 years
experience in C and/or C++, preferably in Windows DirectShow
(TM) environments. Experience in video processing
(especially MPEG-2 and MPEG-4) is a plus.
Date: Jan 2004
Apply at: jobs@xeole.com